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ltc3620 1 3620fa typical application features applications description ultralow power 15ma synchronous step-down switching regulator the ltc ? 3620 is a high ef? ciency, synchronous buck regulator, suitable for very low power, very small footprint applications powered by a single li-ion battery. the internal synchronous switches increase ef? ciency and eliminate the need for external schottky diodes. low output voltages are easily supported by the 0.6v feedback reference voltage. the ltc3620-1 option is internally programmed to provide a 1.1v output. the ltc3620 uses a unique variable frequency architecture to minimize power loss and achieve high ef? ciency. the switching frequency is proportional to the load current, and an internal frequency clamp forces a minimum switching frequency at light loads to minimize noise in the audio range. the user can program the frequency of this clamp by applying an external clock to the fmin/mode pin. the battery status output, lobatb, indicates when the input voltage drops below 3v. to help prevent damage to the battery, an undervoltage lockout (uvlo) circuit shuts down the part if the input voltage falls below 2.8v. the ltc3620 is available in a low pro? le, 2mm 2mm 8-lead dfn package. high ef? ciency low power step-down converter n high ef? ciency: up to 95% n maximum current output: 15ma n externally programmable frequency clamp with internal 50khz default minimizes audio noise n 18a i q current n 2.9v to 5.5v input voltage range n low-battery detection n 0.6v reference allows low output voltages n shutdown mode draws <1a supply current n 2.8v undervoltage lockout n unique low noise control architecture n internal power mosfets n no schottky diodes required n internal soft-start n tiny 2mm 2mm 8-lead dfn package n hearing aids n wireless headsets n li-ion cell applications n button cell replacement ef? ciency vs load current v in run 1f cer 1f cer lobatb v in 2.9v to 5.5v v out 1.1v 523k 3620 ta01a 432k 22h 22pf ltc3620 sw v fb fmin/mode gnd load current (ma) 0.1 40 efficiency (%) power loss (mw) 50 60 70 80 110 3620 ta01c 30 20 10 0 90 100 1.0 1.5 2.0 0.5 0 2.5 3.0 v out = 1.1v v out = 1.8v v out = 2.5v efficiency loss v in = 3v fmin/mode = 0v output current (ma) 0 $ v out (mv p-p ) 10 15 3620 ta01b 5 0 5 10 15 25 v in = 5.5v 20 v out = 1.1v fmin/mode = 0v l = 22h v in = 3.6v output voltage ripple vs load current l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 7528587.
ltc3620 2 3620fa pin configuration absolute maximum ratings input supply voltage .................................... C0.3v to 6v run voltage ................................. C0.3v to (v in + 0.3v) v fb voltage ................................... C0.3v to (v in + 0.3v) lobatb voltage ........................................... C0.3v to 6v fmin/mode voltage ..................... C0.3v to (v in + 0.3v) sw voltage .................................. C0.3v to (v in + 0.3v) p-channel switch source current (dc) ..................50ma n-channel switch sink current (dc) ......................50ma operating junction temperature range (note 2) .................................................. C40c to 125c storage temperature range ................... C65c to 150c (note 1) top view sw gnd fmin/mode lobatb v in run v fb nc dc package 8-lead (2mm 2mm) plastic dfn 9 gnd 4 1 2 3 6 5 7 8 t jmax = 125c, ja = 88.5c/w exposed pad (pin 9) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range ltc3620edc#pbf ltc3620edc#trpbf lfjj 8-lead (2mm 2mm) plastic dfn C40c to 85c ltc3620edc-1#pbf ltc3620edc-1#trpbf lfjk 8-lead (2mm 2mm) plastic dfn C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ electrical characteristics the l denotes the speci? cations which apply over the full operating junction temperature range, otherwise speci? cations are for t a = 25c (note 2). v in = 3.6v unless otherwise noted. symbol parameter conditions min typ max units v in input voltage range l 2.9 5.5 v v fb regulated feedback voltage (note 3) ltc3620 ltc3620 ltc3620-1 ltc3620-1 l l 0.594 0.588 1.089 1.078 0.6 0.6 1.1 1.1 0.606 0.612 1.111 1.122 v v v v v fb reference voltage line regulation v in = 3v to 5.5v (note 3) 0.05 0.15 %/v v loadreg output voltage load regulation (note 3) 0.5 % i q quiescent current, no switching v fb = 0.65v, fmin/mode = v in 18 25 a i qsd quiescent current in shutdown run = 0v 0.01 1 a i qu quiescent current in uvlo condition run = v in , v in = 2.5v 0.5 a i pk peak inductor current 35 ma f sw minimum switching frequency (internal) v fb = 0.65v, fin/mode = 0 l 40 50 khz v run run input voltage high 0.8 v run input voltage low 0.3 v i run run leakage current 0.01 1 a
ltc3620 3 3620fa note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3620 is tested under pulsed load conditions such that t j t a . ltc3620e is guaranteed to meet speci? cations from 0c to 85c junction temperature. speci? cations over the C40c to 85c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. note that the maximum ambient temperature consistent with these speci? cations is determined by speci? c operating conditions in conjunction with board layout, the rated electrical characteristics the l denotes the speci? cations which apply over the full operating junction temperature range, otherwise speci? cations are for t a = 25c (note 2). v in = 3.6v unless otherwise noted. symbol parameter conditions min typ max units v fmin fmin/mode input voltage high 0.9 v fmin/mode input voltage low 0.7 v f ext fmin/mode input frequency 20 300 khz i fmin/mode fmin/mode pin leakage current 0.01 1 a i sw switch leakage current v run = 0v, v sw = 0v or 5.5v, v in = 5.5v 0.01 1 a i fb v fb pin current ltc3620, v fb = 0.6v ltc3620-1, v fb = 1.1v 0 1.2 30 2.0 na a v uvlo undervoltage lockout (uvlo) v in decreasing 2.7 2.8 2.9 v v lobatb lobatb threshold voltage v in decreasing 2.93 3.0 3.08 v r lobatb lobatb pull-down on-resistance 15 v hlobatb lobatb hysteresis voltage 100 mv r pfet r ds(on) of p-channel fet (note 4) i sw = 50ma, v in = 3.6v 2.0 r nfet r ds(on) of n-channel fet (note 4) i sw = C50ma, v in = 3.6v 1.0 package thermal impedance and other environmental factors. the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ), where ja (in c/w) is the package thermal impedance. note 3: the ltc3620 is tested in a proprietary test mode that connects v fb to the output of the error ampli? er. note 4: the dfn switch-on resistance is guaranteed by correlation to wafer level measurements.
ltc3620 4 3620fa typical performance characteristics switching frequency vs load current, fmin/mode load regulation ltc3620 feedback voltage vs temperature uvlo threshold vs temperature lobatb threshold vs temperature peak inductor current vs temperature switching waveforms at 250a load, fmin/mode = 0v load current (ma) 0 v out voltage change (%) C0.1 0.1 3620 g02 C0.3 C0.5 5 10 15 0.5 0.3 v in = 3.6v v out = 1.1v fmin/mode = 0v t a = 25c temperature (c) C50 v fb (mv) 600 605 610 130 3620 g03 595 590 580 0 50 100 585 620 615 v in = 3.6v v out = 1.1v fmin/mode = 0v ltc3620-1 feedback voltage vs temperature temperature (c) C50 v fb (v) 1.105 1.110 1.115 130 3620 g04 1.100 1.095 1.090 1.080 0 50 100 1.085 1.125 1.120 v in = 3.6v fmin/mode = 0v quiescent current vs temperature temperature (c) C50 10 quiescent current (a) 12 16 18 20 30 24 0 50 3620 g05 14 26 28 22 100 130 v in = 3.6v v in = 5v v out = 1.1v fmin/mode = v in temperature (c) C50 2.75 uvlo threshold (v) 2.76 2.78 2.79 2.80 2.85 2.82 0 50 3620 g06 2.77 2.83 2.84 2.81 100 130 v out = 1.1v fmin/mode = 0v temperature (c) C50 2.95 lobatb threshold (v) 2.96 2.98 2.99 3.00 3.05 3.02 0 50 3620 g07 2.97 3.03 3.04 3.01 100 130 v out = 1.1v fmin/mode = 0v temperature (c) C50 34 i peak (ma) 35 36 37 38 39 40 0 50 100 130 3620 g08 v out = 1.1v l = 22h v in = 3.6v v in = 5.5v v out (ac) 20mv/div v sw 2v/div i l 25ma/div 4s/div v out = 1.1v v in = 3.6v t a = 25c 3620 g09 load current (ma) 100 switching frequency (khz) 1000 0.01 1 10 20 3620 g01 10 0.1 t a = 25c v in = 3.6v v out = 1.1v 200khz, external fmin/mode = 0v fmin/mode = v in
ltc3620 5 3620fa typical performance characteristics switching waveforms at 12ma load, fmin/mode = 0v switching waveforms at 250a load, fmin/mode = 200khz clock switching waveforms at 1ma load, fmin/mode = 200khz clock switching waveforms at 12ma load, fmin/mode = 200khz start-up waveforms transient response, 250a to 3ma step, fmin/mode = 0v transient response, 1ma to 10ma step, fmin/mode = 0v pfet r ds(on) vs temperature switching waveforms at 1ma load, fmin/mode = 0v v out (ac) 20mv/div v sw 2v/div i l 25ma/div 4s/div v out = 1.1v v in = 3.6v t a = 25c 3620 g10 v out (ac) 20mv/div v sw 2v/div i l 25ma/div 400ns/div v out = 1.1v v in = 3.6v t a = 25c 3620 g11 v fmin/mode 1v/div v sw 2v/div v out (ac) 20mv/div i l 25ma/div 2s/div v out = 1.1v v in = 3.6v t a = 25c 3620 g12 v fmin/mode 1v/div v sw 2v/div v out (ac) 20mv/div i l 25ma/div 2s/div v out = 1.1v v in = 3.6v t a = 25c 3620 g13 v fmin/mode 1v/div v sw 2v/div v out (ac) 20mv/div i l 25ma/div 400ns/div v out = 1.1v v in = 3.6v t a = 25c 3620 g14 v out 200mv/div i l 25ma/div 200s/div v out = 1.1v v in = 3.6v i out = 0ma fmin/mode = 0v t a = 25c 3620 g15 v out (ac) 10mv/div i load 5ma/div 4ms/div v in = 3.6v v out = 1.1v t a = 25c 3620 g16 v out (ac) 20mv/div i load 5ma/div 4ms/div v in = 3.6v v out = 1.1v t a = 25c 3620 g17 temperature (c) C50 r ds(on) () 1.5 1.7 1.9 3620 g18 1.3 1.1 0.5 0 50 100 130 0.9 0.7 2.3 2.1 i sw = 35ma v in = 3.6v v in = 5v
ltc3620 6 3620fa typical performance characteristics ef? ciency vs load current, v out ef? ciency vs load current, fmin/mode frequency ef? ciency vs load current, v in ef? ciency vs f min , 1ma load internal f min vs temperature spectral content, 500a load spectral content, 5ma load nfet r ds(on) vs temperature temperature (c) C50 r ds(on) () 1.1 1.2 1.3 3620 g19 1.0 0.9 0.5 0.6 0 50 100 130 0.8 0.7 1.5 1.4 i sw = 35ma v in = 3.6v v in = 5v load current (ma) 0.1 40 efficiency (%) 50 60 70 80 110 3620 g20 30 20 10 0 90 100 v out = 1.1v v out = 1.8v v out = 2.5v t a = 25c v in = 3v fmin/mode = 0v f min (khz) 0 71 efficiency (%) 72 74 75 76 81 78 100 200 3620 g23 73 79 80 77 300 t a = 25c v in = 3.6v v out = 1.1v fmin/mode = external clock temperature (c) C50 45 internal f min (khz) 46 48 49 50 55 52 0 50 3620 g24 47 53 54 51 100 v in = 3.6v v in = 5v C60 C80 C100 power ratio (dbm) C120 C140 C160 8khz/div 3620 g25 v out = 1.1v v in = 3.6v fmin/mode = 0v t a = 25c 52.5khz C81.4dbm 12.5khz 92.5khz 39.9khz/div 3620 g26 v out = 1.1v v in = 3.6v fmin/mode = 0v t a = 25c C60 C40 C80 C100 power ratio (dbm) C120 C140 355.6khz C80.2dbm 1khz 400khz load current (ma) 0.1 40 efficiency (%) 50 60 70 80 110 3620 g21 30 20 10 0 90 100 fmin = 20khz fmin = 100khz fmin = 200khz t a = 25c v in = 3v v out = 1.1v load current (ma) 0.1 40 efficiency (%) 50 60 70 80 110 3620 g22 30 20 10 0 90 100 v in = 3v v in = 3.6v v in = 5.5v t a = 25c v out = 1.1v fmin/mode = v in
ltc3620 7 3620fa pin functions sw (pin 1): switch node connection to inductor. this pin connects to the internal power mosfet switches. gnd (pin 2): ground connection for internal circuitry and power path return. tie directly to local ground plane. fmin/mode (pin 3): frequency clamp select input. driv- ing this pin with a 20khz to 300khz external clock sets the minimum switching frequency. pulling this pin low sets the minimum switching frequency to the internally set 50khz. pulling this pin high defeats the minimum switching frequency and allows the part to switch at arbitrarily low frequencies dependent on the load current. lobatb (pin 4): low-battery status output. this open- drain output pulls low when v in falls below 3v. nc (pin 5): no connect. v fb (pin 6): regulator feedback pin. this pin receives the feedback voltage from the resistive divider across the output. for the ltc3620-1, this pin must be connected directly to v out . v out is internally divided from v out to the reference voltage of 0.6v as seen in the block diagram. run (pin 7): regulator enable pin. apply a voltage greater than 0.8v to enable the regulator. do not ? oat this pin. v in (pin 8): input supply pin. must be locally bypassed. gnd (exposed pad pin 9): ground. must be soldered to pcb.
ltc3620 8 3620fa block diagram 8 2 icmp pfd uvlo 50khz peak inductor current adjust select v in gnd 3620 bd sw rcmp switch driver 1 eamp 0.6v v fb (ltc3620) 6 v fb (ltc3620-1) 6 lobat shutdown lobatb 3v v in 8 run 7 fmin/mode 3 4
ltc3620 9 3620fa operation the ltc3620 is a variable frequency buck switching regu- lator with a maximum output current of 15ma. at high loads the ltc3620 will supply constant peak current pulses through the output inductor at a frequency dependent on the load current. a switching cycle is initiated by a pulse from the error ampli? er, eamp . the top fet is turned on and remains on until the peak current threshold is sensed by icmp (35ma at full loads). when this occurs, the top fet it is turned off and the bottom fet is turned on. the bottom fet remains on until the inductor current drops to 0a, as sensed by the reverse-current comparator, rcmp . the time interval before another switching cycle is initiated is adjusted based on the output voltage error, measured by the eamp to be the difference between v fb and the 0.6v reference. as the load current decreases, the eamp will decrease the switching frequency to match the load, until the mini- mum switching frequency (internally or externally set) is reached. with the fmin/mode pin pulled low, the minimum frequency is internally set to 50khz. further decreasing the load will cause the phase frequency detector (pfd) to decrease the peak inductor current in order to maintain the switching frequency at 50khz. the minimum switching frequency can be externally set by clocking the fmin/mode pin at the desired minimum switching frequency. the load current below which the switching frequency will be clamped is dependent on the externally set frequency and the value of the inductor used. a higher externally set minimum frequency will result in a higher load current threshold below which the part will lock to this minimum frequency. the relationship between load current and minimum frequency is described by the following equation: i max(lock) = v in () f min () l () 35ma () 2 2v out v in ?v out () the ltc3620 will switch at this externally set frequency at load currents below this threshold; though in general, neither this minimum nor this synchronization will be maintained during load transients. at very light loads, the minimum pfet on time will be reached and the peak inductor current can no longer be reduced. in this situation, the ltc3620 will resume decreasing the regulator switching frequency to prevent the output voltage from climbing uncontrollably. for those applications which are not sensitive to the spectral content of the output ripple, the minimum frequency clamp can be defeated by pulling the fmin/mode pin high. in this mode the inductor current peaks will be held at 35ma and the switching frequency will decrease without limit. figure 1. switching frequency vs load current, fmin/mode load current (ma) 100 switching frequency (khz) 1000 0.01 1 10 20 3620 f01 10 0.1 t a = 25c v in = 3.6v v out = 1.1v 200khz, external fmin/mode = 0v fmin/mode = v in
ltc3620 10 3620fa the part is optimized to get 35ma peaks for v in = 3.6v and v out = 1.1v with an 18h inductor. if the falling slope is too steep the nfet will continue to conduct shortly after the inductor current reaches zero, causing a small reverse current. this means the net power delivered with every pulse will decrease. to mitigate this problem the inductor can be resized. table 2 shows recommended inductors and output capacitors for commonly used output voltages. table 2. recommended inductor and output capacitor sizes for different v out v out (v) l (h) c out (f) 0.9 15 2.2 1.1 22 1 1.1 (ltc3620-1) 22 2.2 1.8 33 2.2 2.5 47 4.7 because the rising di/dt decreases for increased v out and increased l, the inductor current peaks will decrease, causing the maximum load current to decrease as well. figure 2 shows typical maximum load current versus output voltage. applications information choosing an inductor there are a number of different values, sizes and brands of inductors that will work well with this part. table 1 has a number of recommended inductors, though there are many other manufacturers and devices that may also be suitable. consult each manufacturer for more detailed information and for their entire selection of related parts. table 1: representative surface mount inductors vendor part number value (h) dcr () max dc current (ma) w l h (mm 3 ) taiyo yuden cbmf1608t 22 10% 1.3 max 70 0.8 1.6 0.8 murata lqh2mc_02 18 20% 22 20% 1.8 30% 2.1 30% 190 185 1.6 2 0.9 wrth electronics 744028220 22 30% 1.48 max 270 2.8 2.8 1.1 coilcraft lps3010 18 20% 22 20% 1.0 max 1.2 max 380 320 2.95 2.95 0.9 there is a trade-off between physical size and ef? ciency; the inductors in table 1 are shown because of their small footprints, choose larger sized inductors with less core loss and lower dcr to maximize ef? ciency. the ideal inductor value will vary depending on which characteristics are most critical to the designer. use the equations and recommendations in the next sections to help you ? nd the correct inductance value for your design. avoiding audio range switching in order to best avoid switching in the audio range at the lowest possible load current, the minimum frequency should be set as low as is acceptable, and the inductor value should be minimized. for a 1.1v output the smallest recommended inductor value is 15h. adjusting for v out the inductor current peak and zero crossing are dependent on the di/dt. the equations for the rising and falling slopes are as follows: rising di/dt = (v in -v out )/l falling di/dt = v out /l output voltage (v) 0.6 10 maximum load current (ma) 11 13 14 15 20 t a = 25c 17 1.1 1.6 3620 f02 12 18 19 16 2.1 2.6 figure 2. maximum output current vs v out , v in = 3.6v output voltage ripple the quantity of charge transferred from v in to v out per switching cycle is directly proportional to the inductor value. consequently, the output voltage ripple is directly proportional to the inductor value, and the switching frequency for a given load is inversely proportional to the inductor value. for a given load current, higher switching frequency will typically lower the ef? ciency because of the
ltc3620 11 3620fa applications information increase in switching losses internal to the part. this can be partially offset by using inductors with lower loss. the peak-to-peak output voltage ripple can be approxi- mated by: v = i pk 2 () l () v in () 2c out () v out () v in ?v out () the output ripple is a strong function of the peak inductor current, i pk . when the ltc3620 is locked to the minimum switching frequency, i pk is decreased to maintain regula- tion. consequently, v out is reduced in and below the lock range. ef? ciency the ef? ciency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the ef? ciency and which change would produce the most improvement. ef? ciency can be expressed as: ef? ciency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percent- age of input power. although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in the ltc3620s circuits: v in quiescent current and i 2 r losses. v in quiescent current loss dominates the ef? ciency loss at low load currents, whereas the i 2 r loss dominates the ef? ciency loss at medium to high load cur- rents. in a typical ef? ciency plot, the ef? ciency curve at very low load currents can be misleading since the actual power lost is of little consequence, as illustrated on the front page of this data sheet. the quiescent current is due to two components: the dc bias current, i q , as given in the electrical characteristics, and the internal main switch and synchronous switch gate charge currents. the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each time the gate is switched from high to low to high again, a packet of charge, dq, moves from v in to ground. the resulting dq/dt is the current out of v in that is typically larger than the dc bias current and proportional to frequency. both the dc bias and gate charge losses are proportional to v in and thus their effects will be more pronounced at higher supply voltages. the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteristics curves. the i 2 r losses per pulse will be proportional to the peak current squared times the sum of the switch resistance and the inductor resistance: i 2 r loss pulse = i pk 2 3 r eff where r eff = r l + r pfet d + r nfet (1 C d), and d is the ratio of the top switch on-time to the total time of the pulse. additional losses incurred from the inductor dc resistance and core loss may be signi? cant in smaller inductors. capacitor selection higher value, lower cost, ceramic capacitors are now widely available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. because the ltc3620s control loop does not depend on the output capacitors esr for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage charac- teristics of all the ceramics for a given value and size. the output voltage ripple is inversely proportional to the output capacitor. the larger the capacitor, the smaller the ripple, and vice versa. however, the transient response time is directly proportional to c out , so a larger c out means slower response time. to maintain stability and an acceptable output voltage ripple, values for c out should range from 1f to 5f.
ltc3620 12 3620fa applications information setting output voltage the output voltage is set by tying v fb to a resistive divider using the following formula (refer to figure 3): v out = 0.6v r1 + r2 () r2 r1 and r2 should be large to minimize standing load current and improve ef? ciency. the ? xed output version, the ltc3620-1, includes an internal resistive divider, eliminating the need for external resistors. the resistor divider is chosen such that the v fb input current is approximately 1a. for this version, the v fb pin should be connected directly to v out . maximum load current and maximum frequency the maximum current that the ltc3620 can provide is calculated to be just slightly less than half the maximum peak current. the inductor value will determine how much energy is delivered to the output for each switching cycle, and thus the duration of each pulse and the maximum frequency. larger inductors will have slower ramp rates, longer pulses, and thus lower maximum frequencies. conversely, smaller inductors will result in higher maximum frequencies. when using a frequency clamp, large abrupt increasing load steps from levels below the locking range to levels near the maximum output may result in a large drop in the output voltage. this is due to the low bandwidth of the frequency clamp loop in returning the peak inductor current to its maximum. thermal considerations the ltc3620 requires the package backplane metal to be soldered to the pc board. this gives the dfn package exceptional thermal properties, making it dif? cult in normal operation to exceed the maximum junction temperature of the part. in most applications the ltc3620 does not dissipate much heat due to its high ef? ciency and low current. in applications where the ltc3620 is running at high ambient temperatures and high load currents, the heat dissipated may exceed the maximum junction temperature of the part if it is not well thermally grounded. design example this example designs a 1.1v output using a li-ion battery input with voltages between 2.8v to 4.2v, and an average of 3.6v. the internally provided 50khz clock will be used for the minimum switching frequency, so the fmin/mode pin will be pulled low. for a 1.1v output, an 18h inductor should be used (refer to table 2). c out can be chosen from table 2 or can be based on a desired maximum output voltage ripple, v out . for this case lets use a maximum v out equal to 1% of v out , or 11mv. c out = 35ma 2 () 22h () 3.6v () 2 v out 1.1v () 3.6v ? 1.1v () = 1.6f 1.5f figure 3. design example schematic v in run 1f cer c out lobatb lobatb v in 2.9v to 5.5v v out 1.1v r2 3620 f03 r1 1m l 22pf ltc3620 sw v fb fmin/mode gnd
ltc3620 13 3620fa applications information a larger capacitor could be used to reduce this number. keep in mind that while a larger output capacitor will decrease voltage ripple, it will also increase the transient settling time. the optimal range for c out should be be- tween 1f and 5f. the best way to select the feedback resistors is to select a target combined resistance, and try different standard 1% resistor sizes to see which combination will give the least error. for this example a target combined resistance of around 1m will be used. by checking r1 values between 422k and 475k, and calculating r2 using the formula: r2 = 0.6v () r1 v out ? 0.6v it can be found that a value of r2 = 523k and r1 = 432k minimizes the error in this range. the error can be checked by solving for v out and ? nd- ing the percent error from the desired 1.1v. using these resistor values will result in v out = 1.096v, and an error of around 0.4%. using different target resistor sums is acceptable, but a smaller sum will decrease ef? ciency at lower loads, and a larger sum will increase noise sensitiv- ity at the v fb pin. board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc3620: 1. the power traces consisting of gnd, sw and v in should be kept short, direct and wide. 2. the v fb pin should connect directly to the respective feedback resistors, which should also have short, direct paths to v out and gnd respectively. 3. keep c out and c in as close to the ltc3620 as possible. 4. all parts connecting to ground should have their ground terminals in close proximity to the ltc3620 gnd connection. 5. keep the sw node and external clock, if used, away from the sensitive v fb node. also, minimize the length and area of all traces connected to the sw pin, and always use a ground plane under the switching regulator to minimize interplane coupling. 4 1 2 3 6 5 7 8 sw ?? ? ?? ? ?? ? gnd 3620 f04 v in run v fb nc ? fmin/mode ? lobatb r2 l c out c in v in v out r1 c ff * *c ff = 22pf feedforward capacitor + 4 1 2 3 6 5 7 8 sw ?? ? ?? ? ?? ? gnd 3620 f05 v in run v fb nc ? fmin/mode ? lobatb l c out v out c in v in + ltc3620 layout diagram ltc3620-1 layout diagram
ltc3620 14 3620fa typical applications high ef? ciency low power step-down converter, fmin/mode = 0 ef? ciency vs load current ef? ciency vs v in v in run 1f cer 1f cer lobatb lobatb v in 2.9v to 5.5v v out 1.1v 523k 3620 ta02a 432k 1m 22h 22pf ltc3620 sw v fb fmin/mode gnd load current (ma) 0.1 40 efficiency (%) 50 60 70 80 110 3620 ta02b 30 20 10 0 90 100 v in = 3v v in = 3.6v v in = 5.5v t a = 25c v out = 1.1v fmin/mode = 0v v in (v) 2.5 0 efficiency (%) 10 30 40 50 100 70 3.5 4.5 3620 ta02c 20 80 90 60 5.5 6.5 i out = 500a i out = 1ma i out = 10ma t a = 25c v out = 1.1v
ltc3620 15 3620fa typical applications high ef? ciency low power step-down converter, externally programmed f min ef? ciency vs load current ef? ciency vs v in v in run 1f cer 1f cer lobatb lobatb v in 2.9v to 5.5v v out 1.1v 523k 3620 ta03a 432k 1m 22h 22pf ltc3620 sw v fb fmin/mode fmin/mode gnd spectral content, fmin/mode = 20khz clock spectral content, fmin/mode = 100khz clock spectral content, fmin/mode = 200khz clock load current (ma) 0.1 40 efficiency (%) 50 60 70 80 110 3620 ta03b 30 20 10 0 90 100 f min = 20khz f min = 100khz f min = 200khz t a = 25c v in = 3.6v v out = 1.1v 2.99khz/div 3620 ta03d rbw = 3hz v out = 1.1v v in = 3.6v i out = 500a t a = 25c C60 C40 C80 C100 power ratio (dbm) C120 C140 20.0khz C64.9dbm 1khz 30khz 14.9khz/div 3620 ta03e v out = 1.1v v in = 3.6v i out = 1ma t a = 25c C60 C40 C80 C100 power ratio (dbm) C120 C140 99.9khz C59.9dbm 1khz 150khz 21.9khz/div 3620 ta03f v out = 1.1v v in = 3.6v i out = 1ma t a = 25c C60 C40 C80 C100 power ratio (dbm) C120 C140 199.7khz 1khz 220khz v in (v) 2.5 0 efficiency (%) 10 30 40 50 100 70 3.5 4.5 3620 ta03c 20 80 90 60 5.5 6.5 i out = 500a i out = 1ma i out = 10ma t a = 25c v out = 1.1v f min = 200khz
ltc3620 16 3620fa package description 2.00 p 0.10 (4 sides) note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 p 0.10 bottom viewexposed pad 0.64 p 0.10 (2 sides) 0.75 p 0.05 r = 0.115 typ r = 0.05 typ 1.37 p 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0.00 C 0.05 (dc8) dfn 0409 reva 0.23 p 0.05 0.45 bsc 0.25 p 0.05 1.37 p 0.05 (2 sides) recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.64 p 0.05 (2 sides) 1.15 p 0.05 0.70 p 0.05 2.55 p 0.05 package outline 0.45 bsc pin 1 notch r = 0.20 or 0.25 s 45 o chamfer dc package 8-lead plastic dfn (2mm 2mm) (reference ltc dwg # 05-08-1719 rev a)
ltc3620 17 3620fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 8/10 added (note 2) to electrical characteristics header v loadreg value of 0.5% moved from typ to max note 2 updated, note 4 deleted and note numbers corrected v sw value updated on graph g10 pin 9 text updated in pin functions section 2, 3 2 3 5 7
ltc3620 18 3620fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0810 rev a ? printed in usa related parts part number description comments ltc3631/ltc3631-3.3/ ltc3631-5 45v, 100ma (i out ), ultralow quiescent current synchronous step-down dc/dc converter v in : 4.5v to 45v (60v max ), v out(min) = 0.8v, i q = 12a, i sd < 1a, 3mm 3mm dfn package, msop-8e ltc3632 50v, 20ma (i out ), ultralow quiescent current synchronous step-down dc/dc converter v in : 4.5v to 50v (60v max ), v out(min) = 0.8v, i q = 12a, i sd < 1a, 3mm 3mm dfn package, msop-8e ltc3642/ltc3642-3.3/ ltc3642-5 45v, 50ma (i out ), ultralow quiescent current synchronous step-down dc/dc converter v in : 4.5v to 45v (60v max ), v out(min) = 0.8v, i q = 12a, i sd < 1a, 3mm 3mm dfn package, msop-8e ltc3405a/ltc3405ab 300ma i out , 1.5mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 20a, i sd < 1a, thinsot package ltc3406a/ltc3406ab 600ma i out , 1.5mhz, synchronous step-down dc/dc converter 96% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 20a, i sd < 1a, thinsot package ltc3407a/ltc3407a-2 dual 600ma/800ma i out , 1.5mhz/2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 40a, i sd < 1a, ms10e, dfn packages ltc3409 600ma i out , 2.25mhz, synchronous step-down dc/dc converter 96% ef? ciency, v in : 1.6v to 5.5v, v out(min) = 0.6v, i q = 65a, i sd < 1a, dfn package ltc3410/ltc3410b 300ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 26a, i sd < 1a, sc70 package ltc3411a 1.25a i out , 4mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 60a, i sd < 1a, ms10, dfn packages ltc3548 dual 400ma/800ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 40a, i sd < 1a, ms10, dfn packages ltc3561a 1a i out , 4mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 240a, i sd < 1a, 3mm 3mm dfn package typical applications high ef? ciency low power step-down converter, ltc3620-1 internally programmed, 1.1v out ef? ciency vs load current ef? ciency vs v in v in run 1f cer 2.2f cer lobatb lobatb v in 2.9v to 5.5v v out 1.1v 3620 ta04a 1m 22h ltc3620-1 sw v fb fmin/mode gnd load current (ma) 0.1 40 efficiency (%) 50 60 70 80 110 3620 g21 30 20 10 0 90 100 v in = 3v v in = 3.6v v in = 5.5v t a = 25c v out = 1.1v fmin/mode = 0v v in (v) 2.5 0 efficiency (%) 10 30 40 50 100 70 3.5 4.5 3620 ta04c 20 80 90 60 5.5 6.5 i out = 500a i out = 1ma i out = 10ma t a = 25c v out = 1.1v fmin/mode = 0v

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